Searched refs:PHY_19h (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/cmd/aspeed/nettest/ |
| H A D | phy.c | 789 eng->phy.PHY_19h = phy_read( eng, 25 ); in phy_realtek0()
791 if ( ( eng->phy.PHY_19h & 0x0400 ) == 0x0 ) { in phy_realtek0()
792 phy_write( eng, 25, eng->phy.PHY_19h | 0x0400 ); in phy_realtek0()
793 … printf("\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%04x]\n\n", eng->phy.PHY_19h); in phy_realtek0()
794 …PRINTF( FP_IO, "\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%04x]\n\n", eng->phy.PHY_19h ); in phy_realtek0()
795 …RINTF( FP_LOG, "\n\n[Warning] Register 25, bit 10 must be 1 [Reg19h:%04x]\n\n", eng->phy.PHY_19h ); in phy_realtek0()
799 if ( ( eng->phy.PHY_19h & 0x0800 ) == 0x0800 ) { in phy_realtek0()
800 phy_write( eng, 25, eng->phy.PHY_19h & 0xf7ff ); in phy_realtek0()
801 …ng] Register 25, bit 11 must be 0 (TXC should be output mode)[Reg19h:%04x]\n\n", eng->phy.PHY_19h); in phy_realtek0()
802 …g] Register 25, bit 11 must be 0 (TXC should be output mode)[Reg19h:%04x]\n\n", eng->phy.PHY_19h ); in phy_realtek0()
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| H A D | comminf.h | 547 uint32_t PHY_19h ; member
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