Searched refs:PHYESYMCLK_CLOCK_CNTL (Results 1 – 6 of 6) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_dccg.h | 41 SR(PHYESYMCLK_CLOCK_CNTL),\ 89 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_EN, mask_sh),\ 90 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_SRC_SEL, mask_sh),\
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H A D | dcn31_dccg.c | 522 REG_UPDATE_2(PHYESYMCLK_CLOCK_CNTL, in dccg31_set_physymclk() 529 REG_UPDATE_2(PHYESYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_dccg.h | 47 SR(PHYESYMCLK_CLOCK_CNTL),\ 184 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_EN, mask_sh),\ 185 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_SRC_SEL, mask_sh),\
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_dccg.h | 55 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_EN, mask_sh),\ 56 DCCG_SF(PHYESYMCLK_CLOCK_CNTL, PHYESYMCLK_FORCE_SRC_SEL, mask_sh),\
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H A D | dcn32_resource.h | 1292 SR(PHYESYMCLK_CLOCK_CNTL), SR(DPSTREAMCLK_CNTL), SR(HDMISTREAMCLK_CNTL), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dccg.h | 270 uint32_t PHYESYMCLK_CLOCK_CNTL; member
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