Searched refs:PHYDSYMCLK_CLOCK_CNTL (Results 1 – 6 of 6) sorted by relevance
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
H A D | dcn31_dccg.h | 40 SR(PHYDSYMCLK_CLOCK_CNTL),\ 87 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_EN, mask_sh),\ 88 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_SRC_SEL, mask_sh),\
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H A D | dcn31_dccg.c | 505 REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk() 512 REG_UPDATE_2(PHYDSYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
H A D | dcn314_dccg.h | 46 SR(PHYDSYMCLK_CLOCK_CNTL),\ 182 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_EN, mask_sh),\ 183 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_SRC_SEL, mask_sh),\
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
H A D | dcn32_dccg.h | 53 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_EN, mask_sh),\ 54 DCCG_SF(PHYDSYMCLK_CLOCK_CNTL, PHYDSYMCLK_FORCE_SRC_SEL, mask_sh),\
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H A D | dcn32_resource.h | 1291 SR(PHYCSYMCLK_CLOCK_CNTL), SR(PHYDSYMCLK_CLOCK_CNTL), \
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
H A D | dcn20_dccg.h | 269 uint32_t PHYDSYMCLK_CLOCK_CNTL; member
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