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Searched refs:PHYASYMCLK_CLOCK_CNTL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_dccg.h34 SR(PHYASYMCLK_CLOCK_CNTL),\
45 SR(PHYASYMCLK_CLOCK_CNTL),\
53 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
54 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
62 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
63 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_dccg.h37 SR(PHYASYMCLK_CLOCK_CNTL),\
81 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
82 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
H A Ddcn31_dccg.c454 REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
461 REG_UPDATE_2(PHYASYMCLK_CLOCK_CNTL, in dccg31_set_physymclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_dccg.h43 SR(PHYASYMCLK_CLOCK_CNTL),\
176 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
177 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_dccg.h47 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_EN, mask_sh),\
48 DCCG_SF(PHYASYMCLK_CLOCK_CNTL, PHYASYMCLK_FORCE_SRC_SEL, mask_sh),\
H A Ddcn32_resource.h1290 SR(PHYASYMCLK_CLOCK_CNTL), SR(PHYBSYMCLK_CLOCK_CNTL), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dccg.h266 uint32_t PHYASYMCLK_CLOCK_CNTL; member