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Searched refs:PCLK_PWM0_PMU (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Drv1108-cru.h125 #define PCLK_PWM0_PMU 274 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Drv1108-cru.h128 #define PCLK_PWM0_PMU 274 macro
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drv1108.dtsi385 clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
396 clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
407 clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
418 clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>;
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rv1108.c283 GATE(PCLK_PWM0_PMU, "pclk_pwm0_pmu", "pmu_24m_ena", 0,