Searched refs:PCLK_PCIE_COMBO_PIPE_PHY0 (Results 1 – 3 of 3) sorted by relevance
389 #define PCLK_PCIE_COMBO_PIPE_PHY0 374 macro
1602 GATE(PCLK_PCIE_COMBO_PIPE_PHY0, "pclk_pcie_combo_pipe_phy0", "pclk_top_root", 0,
2202 clocks = <&cru CLK_REF_PIPE_PHY0>, <&cru PCLK_PCIE_COMBO_PIPE_PHY0>,