Searched refs:PCI_MSIX_ENTRY_SIZE (Results 1 – 15 of 15) sorted by relevance
38 uint8_t *table_entry = dev->msix_table + vector * PCI_MSIX_ENTRY_SIZE; in msix_prepare_message()91 unsigned offset = vector * PCI_MSIX_ENTRY_SIZE; in msix_vector_masked()155 offset = vector * PCI_MSIX_ENTRY_SIZE + PCI_MSIX_ENTRY_VECTOR_CTRL; in msix_set_mask()216 assert(addr + size <= dev->msix_entries_nr * PCI_MSIX_ENTRY_SIZE); in msix_table_mmio_read()224 int vector = addr / PCI_MSIX_ENTRY_SIZE; in msix_table_mmio_write()227 assert(addr + size <= dev->msix_entries_nr * PCI_MSIX_ENTRY_SIZE); in msix_table_mmio_write()333 table_size = nentries * PCI_MSIX_ENTRY_SIZE; in msix_init()402 if (nentries * PCI_MSIX_ENTRY_SIZE > bar_pba_offset) { in msix_init_exclusive_bar()403 bar_pba_offset = nentries * PCI_MSIX_ENTRY_SIZE; in msix_init_exclusive_bar()486 qemu_put_buffer(f, dev->msix_table, n * PCI_MSIX_ENTRY_SIZE); in msix_save()[all …]
447 entry_nr = addr / PCI_MSIX_ENTRY_SIZE; in pci_msix_write()452 offset = addr % PCI_MSIX_ENTRY_SIZE; in pci_msix_write()469 vec_ctrl = s->msix->phys_iomem_base + entry_nr * PCI_MSIX_ENTRY_SIZE in pci_msix_write()484 entry_nr = addr / PCI_MSIX_ENTRY_SIZE; in pci_msix_read()490 offset = addr % PCI_MSIX_ENTRY_SIZE; in pci_msix_read()492 if (addr < msix->total_entries * PCI_MSIX_ENTRY_SIZE) { in pci_msix_read()565 (total_entries * PCI_MSIX_ENTRY_SIZE in xen_pt_msix_init()590 total_entries * PCI_MSIX_ENTRY_SIZE + msix->table_offset_adjust, in xen_pt_msix_init()631 munmap(msix->phys_iomem_base, msix->total_entries * PCI_MSIX_ENTRY_SIZE in xen_pt_msix_unmap()
26 return desc->pci.mask_base + desc->msi_index * PCI_MSIX_ENTRY_SIZE; in pci_msix_desc_addr()
575 return ioremap(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE); in msix_map_region()656 for (i = 0; i < tsize; i++, base += PCI_MSIX_ENTRY_SIZE) in msix_mask_all()
327 uint64_t off = (entry / 32) * PCI_MSIX_ENTRY_SIZE / 4; in qpci_msix_pending()340 uint64_t vector_off = dev->msix_table_off + entry * PCI_MSIX_ENTRY_SIZE; in qpci_msix_masked()
337 #define PCI_MSIX_ENTRY_SIZE 16 macro
338 #define PCI_MSIX_ENTRY_SIZE 16 macro
313 val = (offset + (interrupts * PCI_MSIX_ENTRY_SIZE)) | bir; in cdns_pcie_ep_set_msix()
428 val = (offset + (interrupts * PCI_MSIX_ENTRY_SIZE)) | bir; in dw_pcie_ep_set_msix()
1399 (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE)); in vfio_pci_fixup_msix_region()1460 msix_sz = (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE) + in vfio_pci_relocate_msix()1536 (vdev->msix->entries * PCI_MSIX_ENTRY_SIZE); in vfio_pci_relocate_msix()
837 msix_table_size = PCI_MSIX_ENTRY_SIZE * epf->msix_interrupts; in pci_epf_test_alloc_space()
1034 msix_table_size = PCI_MSIX_ENTRY_SIZE * ntb->db_count; in epf_ntb_config_spad_bar_alloc()
1038 reg = ALX_MSIX_ENTRY_BASE + index * PCI_MSIX_ENTRY_SIZE + in alx_mask_msix()
703 max_msix * PCI_MSIX_ENTRY_SIZE, in rvu_setup_msix_resources()758 max_msix * PCI_MSIX_ENTRY_SIZE, in rvu_free_hw_resources()
8260 msix_table_size = PCI_MSIX_ENTRY_SIZE * total_irqs; in nvme_mbar_size()