Home
last modified time | relevance | path

Searched refs:PCIE_P_CNTL__MASTER_PLL_LANE_NUM__SHIFT (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_4_3_0_sh_mask.h32993 #define PCIE_P_CNTL__MASTER_PLL_LANE_NUM__SHIFT … macro
H A Dnbio_2_3_sh_mask.h55190 #define PCIE_P_CNTL__MASTER_PLL_LANE_NUM__SHIFT … macro
H A Dnbio_7_2_0_sh_mask.h100543 #define PCIE_P_CNTL__MASTER_PLL_LANE_NUM__SHIFT … macro