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Searched refs:PCIEXBAR (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/x86/cpu/broadwell/
H A Dnorthbridge.c15 dm_pci_write_config32(dev, PCIEXBAR + 4, 0); in broadwell_northbridge_early_init()
17 dm_pci_write_config32(dev, PCIEXBAR, MCFG_BASE_ADDRESS | 4 | 1); in broadwell_northbridge_early_init()
/openbmc/u-boot/arch/x86/cpu/ivybridge/
H A Dnorthbridge.c43 dm_pci_read_config32(dev, PCIEXBAR, &pciexbar_reg); in get_pcie_bar()
164 dm_pci_write_config32(dev, PCIEXBAR, DEFAULT_PCIEXBAR | 5); in sandybridge_setup_northbridge_bars()
165 dm_pci_write_config32(dev, PCIEXBAR + 4, in sandybridge_setup_northbridge_bars()
/openbmc/u-boot/arch/x86/include/asm/arch-broadwell/
H A Dpch.h20 #define PCIEXBAR 0x60 macro
41 #define PCIEXBAR 0x60 macro
/openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/
H A Dsandybridge.h52 #define PCIEXBAR 0x60 macro