Searched refs:PCIEXBAR (Results 1 – 4 of 4) sorted by relevance
/openbmc/u-boot/arch/x86/cpu/broadwell/ |
H A D | northbridge.c | 15 dm_pci_write_config32(dev, PCIEXBAR + 4, 0); in broadwell_northbridge_early_init() 17 dm_pci_write_config32(dev, PCIEXBAR, MCFG_BASE_ADDRESS | 4 | 1); in broadwell_northbridge_early_init()
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/openbmc/u-boot/arch/x86/cpu/ivybridge/ |
H A D | northbridge.c | 43 dm_pci_read_config32(dev, PCIEXBAR, &pciexbar_reg); in get_pcie_bar() 164 dm_pci_write_config32(dev, PCIEXBAR, DEFAULT_PCIEXBAR | 5); in sandybridge_setup_northbridge_bars() 165 dm_pci_write_config32(dev, PCIEXBAR + 4, in sandybridge_setup_northbridge_bars()
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/openbmc/u-boot/arch/x86/include/asm/arch-broadwell/ |
H A D | pch.h | 20 #define PCIEXBAR 0x60 macro 41 #define PCIEXBAR 0x60 macro
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/openbmc/u-boot/arch/x86/include/asm/arch-ivybridge/ |
H A D | sandybridge.h | 52 #define PCIEXBAR 0x60 macro
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