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Searched refs:PC (Results 1 – 25 of 182) sorted by relevance

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/openbmc/u-boot/board/dhelectronics/dh_imx6/
H A Ddh_imx6.c42 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
46 .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC,
47 .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC,
51 .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC,
52 .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC,
59 .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC,
60 .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC,
64 .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
65 .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
72 .i2c_mode = MX6DL_PAD_GPIO_3__I2C3_SCL | PC,
[all …]
/openbmc/u-boot/board/ccv/xpress/
H A Dxpress.c59 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
63 .i2c_mode = MX6_PAD_GPIO1_IO02__I2C1_SCL | PC,
64 .gpio_mode = MX6_PAD_GPIO1_IO02__GPIO1_IO02 | PC,
68 .i2c_mode = MX6_PAD_GPIO1_IO03__I2C1_SDA | PC,
69 .gpio_mode = MX6_PAD_GPIO1_IO03__GPIO1_IO03 | PC,
76 .i2c_mode = MX6_PAD_GPIO1_IO00__I2C2_SCL | PC,
77 .gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO00 | PC,
81 .i2c_mode = MX6_PAD_GPIO1_IO01__I2C2_SDA | PC,
82 .gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO01 | PC,
89 .i2c_mode = MX6_PAD_UART2_TX_DATA__I2C4_SCL | PC,
[all …]
/openbmc/u-boot/board/liebherr/display5/
H A Ddisplay5.c122 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
126 .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
127 .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC,
131 .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC,
132 .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC,
140 .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC,
141 .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
145 .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC,
146 .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
154 .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
[all …]
/openbmc/u-boot/board/k+p/kp_imx6q_tpc/
H A Dkp_imx6q_tpc.c41 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
45 .i2c_mode = MX6Q_PAD_CSI0_DAT9__I2C1_SCL | PC,
46 .gpio_mode = MX6Q_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
50 .i2c_mode = MX6Q_PAD_CSI0_DAT8__I2C1_SDA | PC,
51 .gpio_mode = MX6Q_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
58 .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
59 .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
63 .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
64 .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
/openbmc/u-boot/board/aristainetos/
H A Daristainetos.c55 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
70 .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC,
71 .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
75 .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
76 .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
83 .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
84 .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
88 .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
89 .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
/openbmc/u-boot/board/kosagi/novena/
H A Dnovena_spl.c68 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
200 .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
201 .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC,
205 .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC,
206 .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC,
219 .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC,
220 .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
224 .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC,
225 .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
238 .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
[all …]
/openbmc/u-boot/board/barco/titanium/
H A Dtitanium.c61 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
65 .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC,
66 .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
70 .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
71 .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
78 .i2c_mode = MX6_PAD_GPIO_3__I2C3_SCL | PC,
79 .gpio_mode = MX6_PAD_GPIO_3__GPIO1_IO03 | PC,
83 .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC,
84 .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC,
/openbmc/u-boot/board/warp/
H A Dwarp.c101 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
104 .i2c_mode = MX6_PAD_I2C1_SDA__I2C1_SDA | PC,
105 .gpio_mode = MX6_PAD_I2C1_SDA__GPIO_3_13 | PC,
109 .i2c_mode = MX6_PAD_I2C1_SCL__I2C1_SCL | PC,
110 .gpio_mode = MX6_PAD_I2C1_SCL__GPIO_3_12 | PC,
/openbmc/u-boot/board/bachmann/ot1200/
H A Dot1200.c122 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
127 .i2c_mode = MX6_PAD_EIM_EB2__I2C2_SCL | PC,
128 .gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
132 .i2c_mode = MX6_PAD_EIM_D16__I2C2_SDA | PC,
133 .gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
141 .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
142 .gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC,
146 .i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC,
147 .gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC,
/openbmc/u-boot/board/freescale/mx6sabreauto/
H A Dmx6sabreauto.c57 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
98 .i2c_mode = MX6Q_PAD_EIM_EB2__I2C2_SCL | PC,
99 .gpio_mode = MX6Q_PAD_EIM_EB2__GPIO2_IO30 | PC,
103 .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
104 .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
111 .i2c_mode = MX6DL_PAD_EIM_EB2__I2C2_SCL | PC,
112 .gpio_mode = MX6DL_PAD_EIM_EB2__GPIO2_IO30 | PC,
116 .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC,
117 .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC,
129 .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
[all …]
/openbmc/u-boot/board/freescale/p1_p2_rdb_pc/
H A DREADME4 P1020MSBG-PC
5 P1020RDB-PC
7 P1020UTM-PC
8 P1021RDB-PC
11 P2020RDB-PC
13 They have similar design of P1020RDB but have DDR3 instead of DDR2. P2020RDB-PC
/openbmc/qemu/docs/system/arm/
H A Dorangepi.rst1 Orange Pi PC (``orangepi-pc``)
4 The Xunlong Orange Pi PC is an Allwinner H3 System on Chip
13 The Orange Pi PC machine supports the following devices:
34 Currently, Orange Pi PC does *not* support the following features:
46 The Orange Pi PC machine can start using the standard -kernel functionality
47 for loading a Linux kernel or ELF executable. Additionally, the Orange Pi PC
59 The Allwinner RTC device is automatically created by the Orange Pi PC machine
82 To build a Linux mainline kernel that can be booted by the Orange Pi PC machine,
107 To boot the newly build linux kernel in QEMU with the Orange Pi PC machine, use:
116 Orange Pi PC images
[all …]
/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dspl.c40 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
43 .i2c_mode = IMX8MQ_PAD_I2C1_SCL__I2C1_SCL | PC,
44 .gpio_mode = IMX8MQ_PAD_I2C1_SCL__GPIO5_IO14 | PC,
48 .i2c_mode = IMX8MQ_PAD_I2C1_SDA__I2C1_SDA | PC,
49 .gpio_mode = IMX8MQ_PAD_I2C1_SDA__GPIO5_IO15 | PC,
/openbmc/qemu/linux-user/mips/
H A Dcpu_loop.c44 target_ulong pc = env->active_tc.PC; in do_tr_or_bp()
81 env->active_tc.PC += 4; in cpu_loop()
140 env->active_tc.PC -= 4; in cpu_loop()
166 env->active_tc.PC); in cpu_loop()
181 force_sig_fault(TARGET_SIGFPE, si_code, env->active_tc.PC); in cpu_loop()
184 force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->active_tc.PC); in cpu_loop()
252 env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1; in target_cpu_copy_regs()
/openbmc/qemu/target/mips/tcg/system/
H A Dspecial_helper.c49 env->active_tc.PC, env->CP0_EPC); in debug_pre_eret()
64 env->active_tc.PC, env->CP0_EPC); in debug_post_eret()
96 && !tcg_cflags_has(cs, CF_PCREL) && env->active_tc.PC != tb->pc) { in mips_io_recompile_replay_branch()
97 env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); in mips_io_recompile_replay_branch()
/openbmc/u-boot/board/gateworks/gw_ventana/
H A Dcommon.c90 .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC,
91 .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC,
95 .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC,
96 .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC,
101 .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC,
102 .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC,
106 .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC,
107 .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC,
112 .i2c_mode = MX6Q_PAD_GPIO_3__I2C3_SCL | PC,
113 .gpio_mode = MX6Q_PAD_GPIO_3__GPIO1_IO03 | PC,
[all …]
/openbmc/u-boot/board/toradex/apalis_imx6/
H A Dapalis_imx6.c106 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
110 .i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC,
111 .gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
115 .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
116 .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
124 .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
125 .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
129 .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
130 .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
138 .i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
[all …]
/openbmc/qemu/target/tricore/
H A Dcpu.c40 cpu_env(cs)->PC = value & ~(target_ulong)1; in tricore_cpu_set_pc()
45 return cpu_env(cs)->PC; in tricore_cpu_get_pc()
53 .pc = env->PC, in tricore_get_tb_cpu_state()
62 cpu_env(cs)->PC = tb->pc; in tricore_cpu_synchronize_from_tb()
69 cpu_env(cs)->PC = data[0]; in tricore_restore_state_to_opc()
/openbmc/qemu/docs/system/
H A Dtarget-sparc64.rst7 (UltraSPARC PC-like machine), Sun4v (T1 PC-like machine), or generic
33 - PC-compatible serial ports
H A Dtarget-mips.rst45 - PC-style IRQ and DMA controllers
47 - PC Keyboard
55 - PC-style IRQ controller
57 - PC Keyboard
88 - PC style serial port
H A Dtarget-i386-desc.rst.inc1 The QEMU PC System emulator simulates the following peripherals:
34 - PC speaker
42 QEMU uses the PC BIOS from the Seabios project and the Plex86/Bochs LGPL
67 The PC speaker audio device can be configured using the pcspk-audiodev
/openbmc/u-boot/board/boundary/nitrogen6x/
H A Dnitrogen6x.c86 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) macro
91 .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC,
92 .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC,
96 .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC,
97 .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC,
105 .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
106 .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
110 .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
111 .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
119 .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC,
[all …]
/openbmc/u-boot/board/barco/platinum/
H A Dplatinum_titanium.c97 .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
98 .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
110 .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | PC,
111 .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC,
H A Dplatinum_picon.c107 .i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
108 .gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
120 .i2c_mode = MX6_PAD_GPIO_6__I2C3_SDA | PC,
121 .gpio_mode = MX6_PAD_GPIO_6__GPIO1_IO06 | PC,
/openbmc/u-boot/board/technexion/pico-imx7d/
H A DREADME4 Required software on the host PC:
25 Connect a USB to serial adapter between the host PC and pico.
27 Connect a USB cable between the OTG pico port and the host PC.
58 Flash SPL and u-boot.img into the eMMC running the following commands on a PC:

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