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Searched refs:PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h6979 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT 0x0000000d macro
H A Dgfx_7_2_sh_mask.h5752 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT 0xd macro
H A Dgfx_8_1_sh_mask.h7074 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT 0xd macro
H A Dgfx_8_0_sh_mask.h6540 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT 0xd macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16936 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro
H A Dgc_9_1_sh_mask.h18245 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h18122 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h20248 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h10369 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h22141 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h24433 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h24471 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h22622 #define PA_SU_SC_MODE_CNTL__POLY_OFFSET_PARA_ENABLE__SHIFT … macro