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Searched refs:PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h5620 #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 0x00000020L macro
H A Dgfx_7_2_sh_mask.h5675 #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 0x20 macro
H A Dgfx_8_0_sh_mask.h6463 #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 0x20 macro
H A Dgfx_8_1_sh_mask.h6997 #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK 0x20 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1649 #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK … macro
H A Dgc_9_2_1_sh_mask.h1480 #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK … macro
H A Dgc_9_4_3_sh_mask.h1584 #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK … macro
H A Dgc_11_0_3_sh_mask.h7776 #define PA_CL_ENHANCE__XTRA_DEBUG_REG_SEL_MASK … macro