Searched refs:PADS_PLL_CTL_RST_B4SM (Results 1 – 2 of 2) sorted by relevance
148 #define PADS_PLL_CTL_RST_B4SM (0x1 << 1) macro693 value &= ~PADS_PLL_CTL_RST_B4SM; in tegra_pcie_phy_enable()700 value |= PADS_PLL_CTL_RST_B4SM; in tegra_pcie_phy_enable()
240 #define PADS_PLL_CTL_RST_B4SM (1 << 1) macro936 value &= ~PADS_PLL_CTL_RST_B4SM; in tegra_pcie_phy_enable()943 value |= PADS_PLL_CTL_RST_B4SM; in tegra_pcie_phy_enable()983 value &= ~PADS_PLL_CTL_RST_B4SM; in tegra_pcie_phy_disable()