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Searched refs:OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h14350 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_0_3_sh_mask.h14457 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_0_1_sh_mask.h23165 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_2_1_0_sh_mask.h27581 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_2_1_sh_mask.h24582 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_1_0_sh_mask.h21712 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_1_2_sh_mask.h29492 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_1_5_sh_mask.h27517 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_1_6_sh_mask.h30258 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_0_2_sh_mask.h26513 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_1_4_sh_mask.h31425 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_0_0_sh_mask.h30044 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_2_0_0_sh_mask.h30932 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro
H A Ddcn_3_2_0_sh_mask.h24579 #define OTG0_OTG_CONTROL__OTG_CURRENT_MASTER_EN_STATE_MASK macro