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Searched refs:OP_TLBI_VAALE1ISNXS (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/arm64/include/asm/
H A Dsysreg.h656 #define OP_TLBI_VAALE1ISNXS sys_insn(1, 0, 9, 3, 7) macro
/openbmc/linux/arch/arm64/kvm/
H A Demulate-nested.c590 SR_TRAP(OP_TLBI_VAALE1ISNXS, CGT_HCR_TTLB_TTLBIS),
1098 SR_FGF(OP_TLBI_VAALE1ISNXS, HFGITR, TLBIVAALE1IS, 1, HCRX_FGTnXS),