Searched refs:OP_TLBI_ASIDE1ISNXS (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/arm64/include/asm/ |
| H A D | sysreg.h | 653 #define OP_TLBI_ASIDE1ISNXS sys_insn(1, 0, 9, 3, 2) macro
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| /openbmc/linux/arch/arm64/kvm/ |
| H A D | emulate-nested.c | 587 SR_TRAP(OP_TLBI_ASIDE1ISNXS, CGT_HCR_TTLB_TTLBIS),
1101 SR_FGF(OP_TLBI_ASIDE1ISNXS, HFGITR, TLBIASIDE1IS, 1, HCRX_FGTnXS),
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