Searched refs:OPC_RISC_C_FUNC_FSW_SD (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/target/riscv/ | ||
H A D | instmap.h | 399 OPC_RISC_C_FUNC_FSW_SD = 0x7 enumerator |
H A D | cpu_helper.c | 1628 case OPC_RISC_C_FUNC_FSW_SD: in riscv_transformed_insn() |