Searched refs:OPC2_32_RRR1_MADDSUM_H_64_LU (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/target/tricore/ | ||
H A D | tricore-opcodes.h | 1324 OPC2_32_RRR1_MADDSUM_H_64_LU = 0x1d, enumerator |
H A D | translate.c | 7215 case OPC2_32_RRR1_MADDSUM_H_64_LU: in decode_rrr1_maddsu_h() |