Searched refs:OP1 (Results 1 – 5 of 5) sorted by relevance
| /openbmc/qemu/target/arm/ |
| H A D | cpu-sysregs.h | 21 #define DEF(NAME, OP0, OP1, CRN, CRM, OP2) NAME##_IDX, argument
29 #define DEF(NAME, OP0, OP1, CRN, CRM, OP2) \ argument
30 SYS_##NAME = ENCODE_ID_REG(OP0, OP1, CRN, CRM, OP2),
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| /openbmc/qemu/tests/tcg/i386/ |
| H A D | test-i386.h | 30 #ifdef OP1
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| H A D | test-i386.c | 110 #define OP1 macro
115 #define OP1 macro
120 #define OP1 macro
125 #define OP1 macro
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| /openbmc/qemu/linux-headers/asm-arm64/ |
| H A D | kvm.h | 250 ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
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| /openbmc/qemu/target/i386/tcg/ |
| H A D | emit.c.inc | 1116 * There are two output operands, so zero OP1's high 128 bits
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