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Searched refs:ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h15974 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h26366 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h32502 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h27669 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h32630 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h30498 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h33396 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h30532 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h34512 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h34891 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h35827 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h27666 #define ODM_MEM_PWR_CTRL3__ODM_MEM_UNASSIGNED_PWR_MODE__SHIFT … macro