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Searched refs:ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h22970 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_2_1_0_sh_mask.h27272 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_3_2_1_sh_mask.h24385 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_3_1_2_sh_mask.h29297 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_3_1_5_sh_mask.h27322 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_3_1_6_sh_mask.h30063 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_3_0_2_sh_mask.h26259 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_3_1_4_sh_mask.h31228 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_3_0_0_sh_mask.h29732 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_2_0_0_sh_mask.h30621 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro
H A Ddcn_3_2_0_sh_mask.h24382 #define ODM3_OPTC_WIDTH_CONTROL__OPTC_SEGMENT_WIDTH_MASK … macro