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Searched refs:NV03_PFIFO_CACHE1_PUT (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dregsnv04.h42 #define NV03_PFIFO_CACHE1_PUT 0x00003210 macro
H A Dnv04.c79 nvkm_wr32(device, NV03_PFIFO_CACHE1_PUT, 0); in nv04_chan_stop()
/openbmc/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_reg.h478 #define NV03_PFIFO_CACHE1_PUT 0x00003210 macro