Searched refs:NAND_DEV0_CFG0 (Results 1 – 1 of 1) sorted by relevance
| /openbmc/linux/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 27 #define NAND_DEV0_CFG0 0x20 macro
712 case NAND_DEV0_CFG0: in offset_to_nandc_reg()
841 nandc_set_reg(chip, NAND_DEV0_CFG0, cfg0); in update_rw_regs()
1224 write_reg_dma(nandc, NAND_DEV0_CFG0, 3, 0); in config_nand_page_read()
1283 write_reg_dma(nandc, NAND_DEV0_CFG0, 3, 0); in config_nand_page_write()
2814 nandc_set_reg(chip, NAND_DEV0_CFG0, in qcom_misc_cmd_type_exec()
2834 write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL); in qcom_misc_cmd_type_exec()
2879 nandc_set_reg(chip, NAND_DEV0_CFG0, 0 << CW_PER_PAGE in qcom_param_page_type_exec()
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