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/openbmc/openbmc/meta-quanta/meta-s6q/recipes-phosphor/configuration/s6q-yaml-config/
H A Dipmi-sensors.yaml534 xyz.openbmc_project.Memory.MemoryECC:
558 xyz.openbmc_project.Memory.MemoryECC:
582 xyz.openbmc_project.Memory.MemoryECC:
606 xyz.openbmc_project.Memory.MemoryECC:
630 xyz.openbmc_project.Memory.MemoryECC:
654 xyz.openbmc_project.Memory.MemoryECC:
678 xyz.openbmc_project.Memory.MemoryECC:
702 xyz.openbmc_project.Memory.MemoryECC:
726 xyz.openbmc_project.Memory.MemoryECC:
750 xyz.openbmc_project.Memory.MemoryECC:
[all …]
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/
H A DDimm.interface.yaml7 Data width of Memory.
11 Memory size of DIMM in Kilobyte.
68 Memory Technology of this memory.
135 Video Random Access Memory.
138 Static Random Access Memory.
141 Random Access Memory.
144 Read Only Memory.
147 Flash Memory.
186 Fast Page Mode Memory.
189 Pipelined Nibble Memory.
[all …]
/openbmc/linux/drivers/memory/tegra/
H A DKconfig3 bool "NVIDIA Tegra Memory Controller support"
8 This driver supports the Memory Controller (MC) hardware found on
14 tristate "NVIDIA Tegra20 External Memory Controller driver"
21 This driver is for the External Memory Controller (EMC) found on
27 tristate "NVIDIA Tegra30 External Memory Controller driver"
33 This driver is for the External Memory Controller (EMC) found on
39 tristate "NVIDIA Tegra124 External Memory Controller driver"
45 This driver is for the External Memory Controller (EMC) found on
55 tristate "NVIDIA Tegra210 External Memory Controller driver"
59 This driver is for the External Memory Controller (EMC) found on
/openbmc/u-boot/doc/mvebu/
H A Darmada-8k-memory.txt1 Memory Layout on Armada-8k SoC's
25 0xF6000000 0xF6FFFFFF CP-0 / PCIe#0 Memory space.
27 0xF7000000 0xF7FFFFFF CP-0 / PCIe#1 Memory space.
29 0xF8000000 0xF8FFFFFF CP-0 / PCIe#2 Memory space.
39 0xFA000000 0xFAFFFFFF CP-1 / PCIe#0 Memory space.
41 0xFB000000 0xFBFFFFFF CP-1 / PCIe#1 Memory space.
43 0xFC000000 0xFCFFFFFF CP-1 / PCIe#2 Memory space.
/openbmc/u-boot/doc/
H A DREADME.mpc83xx.ddrecc49 Memory Data Path Error Injection Mask High/Low: 00000001 00000000
51 Memory Single-Bit Error Management (0..255):
55 Memory Error Detect:
56 Multiple Memory Errors: 0
94 Memory Data Path Error Injection Mask High/Low: 00000001 00000001
96 Memory Error Detect:
97 Multiple Memory Errors: 0
102 The Multiple Memory Errors flags not set and Multiple-Bit Error flags are set.
141 Memory Single-Bit Error Management (0..255):
145 Memory Error Detect:
[all …]
H A DREADME.at9113 Memory map
35 Memory map
57 Memory map
81 Memory map
97 Memory map
115 Memory map
136 Memory map
/openbmc/linux/Documentation/PCI/endpoint/
H A Dpci-vntb-function.rst50 5) Memory Window (MW)
94 Memory Window:
110 BAR2 Memory Window 1
111 BAR3 Memory Window 2
112 BAR4 Memory Window 3
113 BAR5 Memory Window 4
125 BAR4 Memory Window 1
/openbmc/linux/drivers/staging/fieldbus/Documentation/ABI/
H A Dfieldbus-dev-cdev6 The cdev interface to drivers for Fieldbus Device Memory
7 (aka. Process Memory).
15 Read from Process Memory's "read area".
19 Write to Process Memory's "write area".
22 When a "Process Memory Read Area Changed" event occurs,
/openbmc/linux/drivers/misc/cardreader/
H A DKconfig10 such as Memory Stick, Memory Stick Pro, Secure Digital and
21 such as Memory Stick, Memory Stick Pro, Secure Digital and
32 such as Memory Stick Pro, Secure Digital and MultiMediaCard.
/openbmc/u-boot/drivers/smem/
H A DKconfig2 bool "SMEM (Shared Memory mamanger) support"
7 bool "Sandbox Shared Memory Manager (SMEM)"
16 bool "Qualcomm Shared Memory Manager (SMEM)"
20 Enable support for the Qualcomm Shared Memory Manager.
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra20-mc.yaml7 title: NVIDIA Tegra20 SoC Memory Controller
15 The Tegra20 Memory Controller merges request streams from various client
17 and returns response data to the various clients. The Memory Controller
21 Tegra20 Memory Controller includes the GART (Graphics Address Relocation
22 Table) which allows Memory Controller to provide a linear view of a
H A Dnvidia,tegra30-mc.yaml7 title: NVIDIA Tegra30 SoC Memory Controller
15 Tegra30 Memory Controller architecturally consists of the following parts:
25 Memory Crossbar, which routes request and responses between Arbitration
27 Memory Crossbar is just a pass through between a single Arbitration Domain
31 are shared across the Memory Subsystem.
33 The Tegra30 Memory Controller handles memory requests from internal clients
78 Memory clock rate in Hz.
/openbmc/phosphor-dbus-interfaces/gen/xyz/openbmc_project/Memory/
H A Dmeson.build4 'xyz/openbmc_project/Memory/MemoryECC__markdown'.underscorify(),
5 input: [ '../../../../yaml/xyz/openbmc_project/Memory/MemoryECC.interface.yaml', ],
13 'xyz/openbmc_project/Memory/MemoryECC',
/openbmc/linux/tools/testing/selftests/mm/
H A Dcharge_reserved_hugetlb.sh426 echo Memory charged to hugtlb=$hugetlb_difference
427 echo Memory charged to reservation=$reserved_difference
455 echo Memory charged to hugtlb=$hugetlb_difference
456 echo Memory charged to reservation=$reserved_difference
510 echo Memory charged to hugtlb1=$hugetlb_difference1
511 echo Memory charged to reservation1=$reserved_difference1
512 echo Memory charged to hugtlb2=$hugetlb_difference2
513 echo Memory charged to reservation2=$reserved_difference2
556 echo Memory charged to hugtlb1=$hugetlb_difference1
557 echo Memory charged to reservation1=$reserved_difference1
[all …]
/openbmc/phosphor-dbus-interfaces/gen/xyz/openbmc_project/Memory/MemoryECC/
H A Dmeson.build3 'xyz/openbmc_project/Memory/MemoryECC__cpp'.underscorify(),
4 input: [ '../../../../../yaml/xyz/openbmc_project/Memory/MemoryECC.interface.yaml', ],
12 'xyz/openbmc_project/Memory/MemoryECC',
/openbmc/qemu/target/hexagon/
H A Dattribs_def.h.inc42 DEF_ATTRIB(MEMSIZE_0B, "Memory width is 0 byte", "", "")
43 DEF_ATTRIB(MEMSIZE_1B, "Memory width is 1 byte", "", "")
44 DEF_ATTRIB(MEMSIZE_2B, "Memory width is 2 bytes", "", "")
45 DEF_ATTRIB(MEMSIZE_4B, "Memory width is 4 bytes", "", "")
46 DEF_ATTRIB(MEMSIZE_8B, "Memory width is 8 bytes", "", "")
49 DEF_ATTRIB(REGWRSIZE_1B, "Memory width is 1 byte", "", "")
50 DEF_ATTRIB(REGWRSIZE_2B, "Memory width is 2 bytes", "", "")
51 DEF_ATTRIB(REGWRSIZE_4B, "Memory width is 4 bytes", "", "")
52 DEF_ATTRIB(REGWRSIZE_8B, "Memory width is 8 bytes", "", "")
53 DEF_ATTRIB(MEMLIKE, "Memory-like instruction", "", "")
[all …]
/openbmc/linux/drivers/memory/samsung/
H A DKconfig3 bool "Samsung Exynos Memory Controller support" if COMPILE_TEST
5 Support for the Memory Controller (MC) devices found on
11 tristate "Exynos5422 Dynamic Memory Controller driver"
17 This adds driver for Samsung Exynos5422 SoC DMC (Dynamic Memory
/openbmc/u-boot/drivers/memory/
H A DKconfig2 # Memory devices
5 menu "Memory Controller drivers"
12 SoCs. AEMIF stands for Asynchronous External Memory Interface and
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dfsl,imx-sdma.yaml7 title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
82 - Memory Stick Host Controller: 13
83 - Shared Memory Stick Host Controller: 14
85 - Memory: 16
86 - FIFO type Memory: 17
88 - IPU Memory: 19
/openbmc/linux/drivers/edac/
H A DKconfig314 tristate "PPC4xx IBM DDR2 Memory Controller"
350 tristate "Highbank Memory Controller"
431 Altera On-Chip RAM Memory for Altera SoCs.
445 Altera NAND FIFO Memory for Altera SoCs.
452 Altera DMA FIFO Memory for Altera SoCs.
459 Altera USB FIFO Memory for Altera SoCs.
466 Altera QSPI FIFO Memory for Altera SoCs.
473 Altera SDMMC FIFO Memory for Altera SoCs.
489 tristate "Synopsys DDR Memory Controller"
532 tristate "Mellanox BlueField Memory ECC"
[all …]
/openbmc/qemu/docs/specs/
H A Dacpi_mem_hotplug.rst7 Memory hot-plug interface (IO port 0xa00-0xa17, 1-4 byte access)
22 Memory device proximity domain
24 Memory device status fields
48 Memory device slot selector, selects active memory device.
58 Memory device control fields
87 Memory hot remove process diagram
/openbmc/linux/tools/testing/selftests/lkdtm/
H A Dtests.txt23 READ_AFTER_FREE call trace:|Memory correctly poisoned
25 READ_BUDDY_AFTER_FREE call trace:|Memory correctly poisoned
26 SLAB_INIT_ON_ALLOC Memory appears initialized
27 BUDDY_INIT_ON_ALLOC Memory appears initialized
/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dmedia_controller.hpp10 Memory, enumerator
15 {MediaControllerType::Memory, "Memory"},
/openbmc/linux/Documentation/ABI/stable/
H A Dsysfs-devices-node3 Contact: Linux Memory Management list <linux-mm@kvack.org>
9 Contact: Linux Memory Management list <linux-mm@kvack.org>
15 Contact: Linux Memory Management list <linux-mm@kvack.org>
21 Contact: Linux Memory Management list <linux-mm@kvack.org>
27 Contact: Linux Memory Management list <linux-mm@kvack.org>
34 Contact: Linux Memory Management list <linux-mm@kvack.org>
42 Contact: Linux Memory Management list <linux-mm@kvack.org>
48 Contact: Linux Memory Management list <linux-mm@kvack.org>
54 Contact: Linux Memory Management list <linux-mm@kvack.org>
61 Contact: Linux Memory Management list <linux-mm@kvack.org>
[all …]
/openbmc/linux/Documentation/arch/xtensa/
H A Datomctl.rst12 2. With and without An Intelligent Memory Controller which
19 On the FPGA Cards we typically simulate an Intelligent Memory controller
21 Memory controller we let it to the atomic operations internally while
22 doing a Cached (WB) transaction and use the Memory RCW for un-cached

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