Searched refs:MXS_DRAM_BASE (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/arch/arm/cpu/arm926ejs/mxs/ |
| H A D | spl_mem_init.c | 107 writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i)); in initialize_dram_values()
130 writel(mxs_dram_vals[i], MXS_DRAM_BASE + (4 * i)); in initialize_dram_values()
137 writel((1 << 24), MXS_DRAM_BASE + (4 * 8)); in initialize_dram_values()
289 setbits_le32(MXS_DRAM_BASE + 0x20, 1 << 16); in mx23_mem_init()
291 clrbits_le32(MXS_DRAM_BASE + 0x40, 1 << 17); in mx23_mem_init()
304 setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19); in mx23_mem_init()
305 setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 11); in mx23_mem_init()
326 clrbits_le32(MXS_DRAM_BASE + 0x40, 1); in mx28_mem_init()
331 clrbits_le32(MXS_DRAM_BASE + 0x44, 1); in mx28_mem_init()
334 setbits_le32(MXS_DRAM_BASE + 0x40, 1); in mx28_mem_init()
[all …]
|
| /openbmc/u-boot/arch/arm/include/asm/arch-mxs/ |
| H A D | regs-base.h | 57 #define MXS_DRAM_BASE 0x800E0000 macro
113 #define MXS_DRAM_BASE 0x800E0000 macro
|