Home
last modified time | relevance | path

Searched refs:MXC_CCM_CCSR_PLL1_SW_CLK_SEL (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx5/
H A Dclock.c653 writel(ccsr | MXC_CCM_CCSR_PLL1_SW_CLK_SEL, in config_pll_clk()
659 writel(ccsr & ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL, in config_pll_clk()
/openbmc/u-boot/arch/arm/include/asm/arch-mx5/
H A Dcrm_regs.h102 #define MXC_CCM_CCSR_PLL1_SW_CLK_SEL (0x1 << 2) macro
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dcrm_regs.h233 #define MXC_CCM_CCSR_PLL1_SW_CLK_SEL (1 << 2) macro