Searched refs:MX6QDL_PAD_SD3_RST__GPIO7_IO08 (Results 1 – 19 of 19) sorted by relevance
285 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* BT_EN */
357 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0
482 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x58
345 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x17071
902 #define MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x2d0 0x6b8 0x000 0x5 0x0 macro
238 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1 /* CPU_DIO_B */
531 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b018
404 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
1049 #define MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x334 0x71c 0x000 0x5 0x0 macro
703 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x0001b0b0
632 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0 /* SD2 level shifter output enable */
442 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x130b0 /*headphone det*/
553 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b0
795 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x120b0
1032 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x858
311 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b0b1
905 #define MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x2d0 0x6b8 0x000 0x5 0x0 macro
1052 #define MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x334 0x71c 0x000 0x5 0x0 macro