Searched refs:MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK (Results 1 – 18 of 18) sorted by relevance
211 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
381 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0xb1
429 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
448 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x3008
426 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
418 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
529 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
278 #define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x0f8 0x40c 0x810 0x2 0x0 macro
411 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x1b0b1
339 #define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x13c 0x50c 0x7f4 0x2 0x2 macro
362 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
377 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
679 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
440 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
448 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
956 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
282 #define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x0f8 0x40c 0x810 0x2 0x0 macro
343 #define MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x13c 0x50c 0x7f4 0x2 0x2 macro