Home
last modified time | relevance | path

Searched refs:MVP_CONTROL2__MVP_MUX_DE_DVOCNTL0_SEL_MASK (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7825 #define MVP_CONTROL2__MVP_MUX_DE_DVOCNTL0_SEL_MASK 0x00000001L macro
H A Ddce_8_0_sh_mask.h10277 #define MVP_CONTROL2__MVP_MUX_DE_DVOCNTL0_SEL_MASK 0x1 macro
H A Ddce_10_0_sh_mask.h9975 #define MVP_CONTROL2__MVP_MUX_DE_DVOCNTL0_SEL_MASK 0x1 macro
H A Ddce_11_0_sh_mask.h9669 #define MVP_CONTROL2__MVP_MUX_DE_DVOCNTL0_SEL_MASK 0x1 macro
H A Ddce_11_2_sh_mask.h10947 #define MVP_CONTROL2__MVP_MUX_DE_DVOCNTL0_SEL_MASK 0x1 macro