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Searched refs:MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7798 #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h10266 #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h9964 #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h9658 #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x10 macro
H A Ddce_11_2_sh_mask.h10936 #define MVP_CONTROL1__MVP_CHANNEL_CONTROL__SHIFT 0x10 macro