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Searched refs:MVFR1 (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/arm/
H A Dcpu-features.h159 return FIELD_EX32(id->mvfr1, MVFR1, FP16) > 0; in isar_feature_aa32_fp16_arith()
161 return FIELD_EX32(id->mvfr1, MVFR1, FPHP) >= 3; in isar_feature_aa32_fp16_arith()
173 FIELD_EX32(id->mvfr1, MVFR1, MVE) > 0; in isar_feature_aa32_mve()
184 FIELD_EX32(id->mvfr1, MVFR1, MVE) >= 2; in isar_feature_aa32_mve_fp()
243 return FIELD_EX32(id->mvfr1, MVFR1, FPHP) > 0; in isar_feature_aa32_fp16_spconv()
248 return FIELD_EX32(id->mvfr1, MVFR1, FPHP) > 1; in isar_feature_aa32_fp16_dpconv()
260 return FIELD_EX32(id->mvfr1, MVFR1, SIMDFMAC) != 0; in isar_feature_aa32_simdfmac()
H A Dcpu.h2365 FIELD(MVFR1, FPFTZ, 0, 4)
2366 FIELD(MVFR1, FPDNAN, 4, 4)
2367 FIELD(MVFR1, SIMDLS, 8, 4) /* A-profile only */
2368 FIELD(MVFR1, SIMDINT, 12, 4) /* A-profile only */
2369 FIELD(MVFR1, SIMDSP, 16, 4) /* A-profile only */
2370 FIELD(MVFR1, SIMDHP, 20, 4) /* A-profile only */
2371 FIELD(MVFR1, MVE, 8, 4) /* M-profile only */
2372 FIELD(MVFR1, FP16, 20, 4) /* M-profile only */
2373 FIELD(MVFR1, FPHP, 24, 4)
2374 FIELD(MVFR1, SIMDFMA
[all...]
H A Dcpu.c2165 u = FIELD_DP32(u, MVFR1, FPFTZ, 0); in arm_cpu_realizefn()
2166 u = FIELD_DP32(u, MVFR1, FPDNAN, 0); in arm_cpu_realizefn()
2167 u = FIELD_DP32(u, MVFR1, FPHP, 0); in arm_cpu_realizefn()
2169 u = FIELD_DP32(u, MVFR1, FP16, 0); in arm_cpu_realizefn()
2221 u = FIELD_DP32(u, MVFR1, SIMDLS, 0); in arm_cpu_realizefn()
2222 u = FIELD_DP32(u, MVFR1, SIMDINT, 0); in arm_cpu_realizefn()
2223 u = FIELD_DP32(u, MVFR1, SIMDSP, 0); in arm_cpu_realizefn()
2224 u = FIELD_DP32(u, MVFR1, SIMDHP, 0); in arm_cpu_realizefn()
2251 u = FIELD_DP32(u, MVFR1, SIMDFMAC, 0); in arm_cpu_realizefn()
/openbmc/linux/arch/arm/vfp/
H A Dvfpmodule.c916 (fmrx(MVFR1) & 0x000fff00) == 0x00011100) { in vfp_init()
939 if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000) in vfp_init()
941 if (((fmrx(MVFR1) & MVFR1_ASIMDHP_MASK) >> MVFR1_ASIMDHP_BIT) == 0x2) in vfp_init()
943 if (((fmrx(MVFR1) & MVFR1_FPHP_MASK) >> MVFR1_FPHP_BIT) == 0x3) in vfp_init()
/openbmc/linux/arch/arm/include/asm/
H A Dvfp.h15 #define MVFR1 cr6 macro
/openbmc/qemu/target/arm/tcg/
H A Dcpu32.c48 t = FIELD_DP32(t, MVFR1, FPHP, 3); /* FEAT_FP16 */ in aa32_max_features()
49 t = FIELD_DP32(t, MVFR1, SIMDHP, 2); /* FEAT_FP16 */ in aa32_max_features()