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Searched refs:MUX_ACLK_300_GSCL_SEL (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dexynos5_setup.h527 #define MUX_ACLK_300_GSCL_SEL 0x0 macro
535 #define CLK_SRC_TOP0_VAL ((MUX_ACLK_300_GSCL_SEL << 25) \