Home
last modified time | relevance | path

Searched refs:MTL_VPU_TOP_NOC_QREQN (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/ivpu/
H A Divpu_hw_37xx.c359 u32 val = REGV_RD32(MTL_VPU_TOP_NOC_QREQN); in ivpu_boot_top_noc_qrenqn_check()
361 if (!REG_TEST_FLD_NUM(MTL_VPU_TOP_NOC_QREQN, CPU_CTRL, exp_val, val) || in ivpu_boot_top_noc_qrenqn_check()
362 !REG_TEST_FLD_NUM(MTL_VPU_TOP_NOC_QREQN, HOSTIF_L2CACHE, exp_val, val)) in ivpu_boot_top_noc_qrenqn_check()
437 val = REGV_RD32(MTL_VPU_TOP_NOC_QREQN); in ivpu_boot_host_ss_top_noc_drive()
439 val = REG_SET_FLD(MTL_VPU_TOP_NOC_QREQN, CPU_CTRL, val); in ivpu_boot_host_ss_top_noc_drive()
440 val = REG_SET_FLD(MTL_VPU_TOP_NOC_QREQN, HOSTIF_L2CACHE, val); in ivpu_boot_host_ss_top_noc_drive()
442 val = REG_CLR_FLD(MTL_VPU_TOP_NOC_QREQN, CPU_CTRL, val); in ivpu_boot_host_ss_top_noc_drive()
443 val = REG_CLR_FLD(MTL_VPU_TOP_NOC_QREQN, HOSTIF_L2CACHE, val); in ivpu_boot_host_ss_top_noc_drive()
445 REGV_WR32(MTL_VPU_TOP_NOC_QREQN, val); in ivpu_boot_host_ss_top_noc_drive()
H A Divpu_hw_37xx_reg.h116 #define MTL_VPU_TOP_NOC_QREQN 0x00000160u macro