Searched refs:MTL_VPU_CPU_SS_TIM_SAFE (Results 1 – 2 of 2) sorted by relevance
270 #define MTL_VPU_CPU_SS_TIM_SAFE 0x060200a8u macro
789 REGV_WR32(MTL_VPU_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in ivpu_hw_37xx_wdt_disable()793 REGV_WR32(MTL_VPU_CPU_SS_TIM_SAFE, TIM_SAFE_ENABLE); in ivpu_hw_37xx_wdt_disable()