Searched refs:MTC0 (Results 1 – 5 of 5) sorted by relevance
| /openbmc/u-boot/arch/mips/cpu/ |
| H A D | start.S | 39 MTC0 zero, CP0_WATCHLO,\sel
194 MTC0 zero, CP0_WATCHLO
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| /openbmc/u-boot/arch/mips/lib/ |
| H A D | genex.S | 149 MTC0 v1, CP0_EPC
196 MTC0 k1, CP0_DESAVE
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| /openbmc/u-boot/arch/mips/include/asm/ |
| H A D | asm.h | 407 #define MTC0 mtc0 macro
411 #define MTC0 dmtc0 macro
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| /openbmc/qemu/target/mips/tcg/ |
| H A D | micromips_translate.c.inc | 226 MTC0 = 0x0b,
1061 case MTC0:
1062 case MTC0 + 32:
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| /openbmc/qemu/disas/ |
| H A D | nanomips.c | 10259 static char *MTC0(uint64 instruction, Dis_info *info) in MTC0() function
16342 0xfc0003ff, 0x20000070, &MTC0 , 0,
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