Searched refs:MT8195_VDO1_MERGE0_ASYNC_CFG_WD (Results 1 – 2 of 2) sorted by relevance
79 #define MT8195_VDO1_MERGE0_ASYNC_CFG_WD 0xe30 macro
192 mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8195_VDO1_MERGE0_ASYNC_CFG_WD + 0x10 * idx, in mtk_mmsys_merge_async_config()