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Searched refs:MT76XX_SYSCTL_BASE (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dmt76xx.h9 #define MT76XX_SYSCTL_BASE 0x10000000 macro
15 #define MT76XX_MEMCTRL_BASE (MT76XX_SYSCTL_BASE + 0x0300)
16 #define MT76XX_RGCTRL_BASE (MT76XX_SYSCTL_BASE + 0x1000)
18 #define MT76XX_ROM_STATUS_REG (MT76XX_SYSCTL_BASE + 0x0028)
19 #define MT76XX_CLKCFG0_REG (MT76XX_SYSCTL_BASE + 0x002c)
20 #define MT76XX_DYN_CFG0_REG (MT76XX_SYSCTL_BASE + 0x0440)
H A Dlowlevel_init.S66 li s0, CKSEG1ADDR(MT76XX_SYSCTL_BASE)