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Searched refs:MSTATUS_TSR (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h551 #define MSTATUS_TSR 0x00400000 /* since: priv-1.10 */ macro
H A Dop_helper.c278 if (get_field(env->mstatus, MSTATUS_TSR) && !(env->priv >= PRV_M)) { in helper_sret()
H A Dcsr.c1330 MSTATUS_MPP | MSTATUS_MXR | MSTATUS_TVM | MSTATUS_TSR | in write_mstatus()