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Searched refs:MSR_WE (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/arch/powerpc/platforms/44x/
H A Didle.c23 mtmsr(msr_save|MSR_WE|MSR_EE|MSR_CE|MSR_DE); in ppc44x_idle()
/openbmc/linux/arch/powerpc/platforms/85xx/
H A Dmpc85xx_pm_ops.c42 tmp |= MSR_WE; in mpc85xx_cpu_die()
/openbmc/linux/arch/powerpc/kernel/
H A Didle_85xx.S67 oris r7,r7,MSR_WE@h
/openbmc/linux/arch/powerpc/platforms/4xx/
H A Dcpm.c85 mtmsr(msr_save|MSR_WE|MSR_EE|MSR_CE|MSR_DE); in cpm_idle_wait()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h23 #define MSR_WE (1<<18) /* Wait State Enable */ macro
/openbmc/linux/arch/powerpc/include/asm/
H A Dreg.h91 #define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ macro
/openbmc/qemu/target/ppc/
H A Dcpu.h440 #define MSR_WE PPC_BIT_NR(45) /* Wait State Enable on 405 */ macro
490 FIELD(MSR, WE, MSR_WE, 1)
H A Dcpu_init.c2173 pcc->msr_mask = (1ull << MSR_WE) |
/openbmc/linux/arch/powerpc/kvm/
H A Dbooke.c722 if (vcpu->arch.shared->msr & MSR_WE) { in kvmppc_core_prepare_to_enter()