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Searched refs:MSR_VSX (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/arch/powerpc/kernel/
H A Dprocess.c127 newmsr |= MSR_VSX; in msr_check_and_set()
145 newmsr &= ~MSR_VSX; in __msr_check_and_clear()
161 msr &= ~MSR_VSX; in __giveup_fpu()
244 msr &= ~MSR_VSX; in __giveup_altivec()
323 msr_check_and_set(MSR_FP|MSR_VEC|MSR_VSX); in giveup_vsx()
325 msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); in giveup_vsx()
415 msr_all_available |= MSR_VSX; in init_msr_all_available()
537 new_msr |= MSR_VSX; in restore_math()
555 if (new_msr & MSR_VSX) in restore_math()
1136 msr_diff &= MSR_FP | MSR_VEC | MSR_VSX; in restore_tm_state()
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H A Dsignal_64.c163 msr &= ~MSR_VSX; in __unsafe_setup_sigcontext()
176 msr |= MSR_VSX; in __unsafe_setup_sigcontext()
237 msr |= tsk->thread.ckpt_regs.msr & (MSR_FP | MSR_VEC | MSR_VSX); in setup_tm_sigcontexts()
302 if (msr & MSR_VSX) in setup_tm_sigcontexts()
310 msr |= MSR_VSX; in setup_tm_sigcontexts()
387 regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX)); in __unsafe_restore_sigcontext()
418 if ((msr & MSR_VSX) != 0) { in __unsafe_restore_sigcontext()
506 regs_set_return_msr(regs, regs->msr & ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX)); in restore_tm_sigcontexts()
552 if (v_regs && ((msr & MSR_VSX) != 0)) { in restore_tm_sigcontexts()
678 (new_msr & MSR_VSX)) in SYSCALL_DEFINE3()
H A Dsignal_32.c302 msr &= ~MSR_VSX; in __unsafe_save_user_regs()
312 msr |= MSR_VSX; in __unsafe_save_user_regs()
431 if (msr & MSR_VSX) in save_tm_user_regs_unsafe()
436 msr |= MSR_VSX; in save_tm_user_regs_unsafe()
520 regs_set_return_msr(regs, regs->msr & ~MSR_VSX); in restore_user_regs()
521 if (msr & MSR_VSX) { in restore_user_regs()
621 regs_set_return_msr(regs, regs->msr & ~MSR_VSX); in restore_tm_user_regs()
622 if (msr & MSR_VSX) { in restore_tm_user_regs()
653 if (msr & MSR_VSX) { in restore_tm_user_regs()
1029 (new_msr & MSR_VSX)) in COMPAT_SYSCALL_DEFINE3()
H A Dfpu.S104 oris r5,r5,MSR_VSX@h
H A Dtm.S142 oris r15,r15, MSR_VSX@h
393 oris r5,r5, MSR_VSX@h
H A Dinterrupt.c211 mathflags |= MSR_VEC | MSR_VSX; in interrupt_exit_user_prepare_main()
H A Dvector.S147 oris r12,r12,MSR_VSX@h
H A Dtraps.c975 msr_mask = MSR_VSX; in p9_hmi_special_emu()
H A Dexceptions-64s.S2672 oris r10,r10,MSR_VSX@h
/openbmc/linux/arch/powerpc/lib/
H A Dldstfp.S162 oris r7,r6,MSR_VSX@h
189 oris r7,r6,MSR_VSX@h
H A Dtest_emulate_step.c72 regs->msr |= MSR_VSX; in init_pt_regs()
H A Dsstep.c3454 unsigned long msrbit = MSR_VSX; in emulate_loadstore()
3525 unsigned long msrbit = MSR_VSX; in emulate_loadstore()
/openbmc/linux/arch/powerpc/include/asm/
H A Dswitch_to.h81 msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX); in disable_kernel_vsx()
H A Dreg.h89 #define MSR_VSX __MASK(MSR_VSX_LG) /* Enable VSX */ macro
/openbmc/linux/arch/powerpc/kvm/
H A Demulate_loadstore.c42 if (!(kvmppc_get_msr(vcpu) & MSR_VSX)) { in kvmppc_check_vsx_disabled()
316 MSR_VSX); in kvmppc_emulate_loadstore()
H A Dbook3s_pr.c184 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); in kvmppc_core_vcpu_put_pr()
368 (MSR_FP | MSR_VEC | MSR_VSX); in kvmppc_handle_lost_math_exts()
391 kvmppc_giveup_ext(vcpu, MSR_VSX); in kvmppc_save_tm_pr()
812 if (msr & MSR_VSX) in kvmppc_giveup_ext()
842 vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX); in kvmppc_giveup_ext()
880 if (msr == MSR_VSX) { in kvmppc_handle_ext()
894 msr = MSR_FP | MSR_VEC | MSR_VSX; in kvmppc_handle_ext()
1378 ext_msr = MSR_VSX; in kvmppc_handle_exit_pr()
1856 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); in kvmppc_vcpu_run_pr()
H A Dtm.S45 oris r8, r8, (MSR_VEC | MSR_VSX)@h
239 oris r5, r5, (MSR_VEC | MSR_VSX)@h
H A Dbook3s_emulate.c177 kvmppc_giveup_ext(vcpu, MSR_VSX); in kvmppc_emulate_trchkpt()
H A Dbook3s_hv_p9_entry.c506 msr_needed |= MSR_VSX; in kvmppc_msr_hard_disable_set_facilities()
H A Dbook3s_hv_rmhandlers.S2454 oris r8,r8,MSR_VSX@h
2490 oris r8,r8,MSR_VSX@h
H A Dpowerpc.c1211 vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VSX); in kvmppc_complete_mmio_load()
H A Dbook3s_hv.c4858 msr |= MSR_VSX; in kvmppc_vcpu_run_hv()
/openbmc/qemu/target/ppc/
H A Dhelper_regs.c174 QEMU_BUILD_BUG_ON(MSR_VSX != HFLAGS_VSX); in hreg_compute_hflags_value()
175 msr_mask |= 1 << MSR_VSX; in hreg_compute_hflags_value()
H A Dcpu.h436 #define MSR_VSX PPC_BIT_NR(40) /* Vector Scalar Extension (>= 2.06)x hflags */ macro
486 FIELD(MSR, VSX, MSR_VSX, 1)
H A Dcpu_init.c6182 (1ull << MSR_VSX) | in POWERPC_FAMILY()
6350 (1ull << MSR_VSX) | in POWERPC_FAMILY()
6544 (1ull << MSR_VSX) | in POWERPC_FAMILY()
6724 (1ull << MSR_VSX) | in POWERPC_FAMILY()
7280 msr |= (target_ulong)1 << MSR_VSX; /* Allow VSX usage */ in ppc_cpu_reset_hold()