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Searched refs:MSR_VR (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dcpu_init.h34 (1ull << MSR_VR) | \
H A Dhelper_regs.c171 QEMU_BUILD_BUG_ON(MSR_VR != HFLAGS_VR); in hreg_compute_hflags_value()
172 msr_mask |= 1 << MSR_VR; in hreg_compute_hflags_value()
H A Dcpu_init.c3250 (1ull << MSR_VR); in POWERPC_FAMILY()
4183 pcc->msr_mask = (1ull << MSR_VR) |
4263 pcc->msr_mask = (1ull << MSR_VR) |
4364 pcc->msr_mask = (1ull << MSR_VR) |
4487 pcc->msr_mask = (1ull << MSR_VR) |
4617 pcc->msr_mask = (1ull << MSR_VR) |
4749 pcc->msr_mask = (1ull << MSR_VR) |
4901 pcc->msr_mask = (1ull << MSR_VR) |
5037 pcc->msr_mask = (1ull << MSR_VR) | in POWERPC_FAMILY()
5981 (1ull << MSR_VR) |
[all...]
H A Dcpu.h436 #define MSR_VR PPC_BIT_NR(38) /* altivec available x hflags */ macro
486 FIELD(MSR, VR, MSR_VR, 1)