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Searched refs:MSR_VR (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dhelper_regs.c170 QEMU_BUILD_BUG_ON(MSR_VR != HFLAGS_VR); in hreg_compute_hflags_value()
171 msr_mask |= 1 << MSR_VR; in hreg_compute_hflags_value()
H A Dcpu_init.c3257 (1ull << MSR_VR); in POWERPC_FAMILY()
4190 pcc->msr_mask = (1ull << MSR_VR) |
4270 pcc->msr_mask = (1ull << MSR_VR) |
4371 pcc->msr_mask = (1ull << MSR_VR) |
4494 pcc->msr_mask = (1ull << MSR_VR) |
4624 pcc->msr_mask = (1ull << MSR_VR) |
4756 pcc->msr_mask = (1ull << MSR_VR) |
4908 pcc->msr_mask = (1ull << MSR_VR) |
5044 pcc->msr_mask = (1ull << MSR_VR) | in POWERPC_FAMILY()
5988 (1ull << MSR_VR) |
[all …]
H A Dcpu.h434 #define MSR_VR PPC_BIT_NR(38) /* altivec available x hflags */ macro
484 FIELD(MSR, VR, MSR_VR, 1)