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Searched refs:MSR_TGPR (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/arch/powerpc/kernel/
H A Dhead_book3s_32.S470 xoris r0,r0,MSR_TGPR>>16
550 xoris r0,r0,MSR_TGPR>>16
/openbmc/qemu/target/ppc/
H A Dhelper_regs.c318 ((value ^ env->msr) & (1 << MSR_TGPR)))) { in hreg_store_msr()
H A Dmachine.c22 env->msr ^= env->msr_mask & ~((1ULL << MSR_TGPR) | MSR_HVB); in post_load_update_msr()
H A Dexcp_helper.c698 if (!(new_msr & ((target_ulong)1 << MSR_TGPR))) { in powerpc_excp_6xx()
699 new_msr |= (target_ulong)1 << MSR_TGPR; in powerpc_excp_6xx()
2628 msr &= ~(1ULL << MSR_TGPR); in do_rfi()
H A Dcpu.h441 #define MSR_TGPR PPC_BIT_NR(46) /* TGPR usage on 602/603 x */ macro
491 FIELD(MSR, TGPR, MSR_TGPR, 1)
H A Dcpu_init.c2585 (1ull << MSR_TGPR) | in POWERPC_FAMILY()
2624 (1ull << MSR_TGPR) | in POWERPC_FAMILY()
3302 (1ull << MSR_TGPR) |
3342 (1ull << MSR_TGPR) |
3388 (1ull << MSR_TGPR) | in POWERPC_FAMILY()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h24 #define MSR_TGPR (1<<17) /* TLB Update registers in use */ macro
/openbmc/linux/arch/powerpc/include/asm/
H A Dreg.h92 #define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */ macro