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Searched refs:MSR_ISF (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/powerpc/include/asm/
H A Dprocessor.h17 #define MSR_ISF (1<<61) macro
/openbmc/qemu/target/ppc/
H A Dcpu.h425 #define MSR_ISF PPC_BIT_NR(2) /* Sixty-four-bit interrupt mode on 630 */ macro
469 FIELD(MSR, ISF, MSR_ISF, 1)