Searched refs:MSR_HVB (Results 1 – 8 of 8) sorted by relevance
296 bool hv_escalation = !(msr & MSR_HVB) && (*new_msr & MSR_HVB); in ppc_excp_apply_ail()345 if (*new_msr & MSR_HVB) { in ppc_excp_apply_ail()1375 if (env->msr_mask & MSR_HVB) { in powerpc_excp_books()1380 new_msr |= (target_ulong)MSR_HVB; in powerpc_excp_books()1406 new_msr |= (target_ulong)MSR_HVB; in powerpc_excp_books()1482 new_msr |= (target_ulong)MSR_HVB; in powerpc_excp_books()1507 if (env->msr_mask & MSR_HVB) { in powerpc_excp_books()1512 new_msr |= (target_ulong)MSR_HVB; in powerpc_excp_books()1538 new_msr |= (target_ulong)MSR_HVB; in powerpc_excp_books()1552 new_msr |= (target_ulong)MSR_HVB; in powerpc_excp_books()[all …]
300 if (!alter_hv || !(env->msr & MSR_HVB)) { in hreg_store_msr()301 value &= ~MSR_HVB; in hreg_store_msr()302 value |= env->msr & MSR_HVB; in hreg_store_msr()305 if (is_book3s_arch2x(env) && !(env->msr & MSR_HVB)) { in hreg_store_msr()
246 if (ppc_interrupts_little_endian(cpu, !!(cpu->env.msr_mask & MSR_HVB))) { in cpu_get_dump_info()
119 if ((env->msr_mask & MSR_HVB) && !FIELD_EX64(env->msr, MSR, HV) && in helper_hfscr_facility_check()
22 env->msr ^= env->msr_mask & ~((1ULL << MSR_TGPR) | MSR_HVB); in post_load_update_msr()
649 #define MSR_HVB (1ULL << MSR_HV) macro651 #define MSR_HVB (0ULL)
6780 env->msr_mask &= ~MSR_HVB; in cpu_ppc_set_vhyp()7268 msr |= (target_ulong)MSR_HVB; in ppc_cpu_reset_hold()7414 env->has_hv_mode = !!(env->msr_mask & MSR_HVB); in ppc_cpu_instance_init()
59 env->msr |= MSR_HVB; /* Hypervisor mode */ in pnv_core_cpu_reset()