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Searched refs:MSR_EIP (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/microblaze/
H A Dhelper.c138 msr |= MSR_EIP; in mb_cpu_do_interrupt()
165 msr |= MSR_EIP; in mb_cpu_do_interrupt()
170 assert(!(msr & (MSR_EIP | MSR_BIP))); in mb_cpu_do_interrupt()
261 && !(env->msr & (MSR_EIP | MSR_BIP)) in mb_cpu_exec_interrupt()
H A Dcpu.h68 #define MSR_EIP (1<<9) /* 0x200 */ macro
H A Dtranslate.c1534 tcg_gen_andi_i32(cpu_msr, cpu_msr, ~(MSR_VM | MSR_UM | MSR_EIP)); in do_rte()
1812 (bool)(env->msr & MSR_EIP), in mb_cpu_dump_state()
/openbmc/linux/arch/microblaze/include/asm/
H A Dregisters.h20 #define MSR_EIP (1<<9) /* 0x200 */ macro
/openbmc/linux/arch/microblaze/kernel/
H A Dprocess.c95 childregs->msr &= ~MSR_EIP; in copy_thread()
H A Dentry.S64 msrclr r0, MSR_EIP
111 andi r11, r11, ~MSR_EIP
252 andni r11, r11, MSR_EIP; /* clear EIP */ \