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Searched refs:MSR_C_STATE_LATENCY_CONTROL_2 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr-index.h167 #define MSR_C_STATE_LATENCY_CONTROL_2 0x60c macro
/openbmc/u-boot/arch/x86/cpu/broadwell/
H A Dcpu.c526 msr_write(MSR_C_STATE_LATENCY_CONTROL_2, msr); in configure_c_states()