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Searched refs:MSCC_MEMPARM_TIMING0 (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h249 #define MSCC_MEMPARM_TIMING0 \ macro
290 #define MSCC_MEMPARM_TIMING0 \ macro
782 writel(MSCC_MEMPARM_TIMING0, BASE_CFG + ICPU_MEMCTRL_TIMING0); in hal_vcoreiii_init_memctl()
785 setbits_le32(BASE_CFG + ICPU_MEMCTRL_TIMING0, MSCC_MEMPARM_TIMING0); in hal_vcoreiii_init_memctl()