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Searched refs:MSCC_DW8051_CNTL_STATUS (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/net/phy/
H A Dmscc.c125 #define MSCC_DW8051_CNTL_STATUS 0 macro
339 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset()
341 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset()
374 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset()
376 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset()
591 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw()
637 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
/openbmc/linux/drivers/net/phy/mscc/
H A Dmscc_main.c896 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset()
898 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset()
931 reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset()
933 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset()
993 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, RUN_FROM_INT_ROM | in vsc8584_patch_fw()
1039 reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
H A Dmscc.h205 #define MSCC_DW8051_CNTL_STATUS 0 macro