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Searched refs:MR0_DLL_RESET (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ram/aspeed/
H A Dsdram_phy_ast2600.h120 #define MR0_DLL_RESET BIT(8) macro
121 #define MR0_VAL (MR0_CL_12 | MR0_WR12_RTP6 | MR0_DLL_RESET)