| /openbmc/qemu/scripts/coccinelle/ |
| H A D | memory-region-housekeeping.cocci | 73 expression MR;
78 -memory_region_init_ram_nomigrate(MR, NULL, NAME, SIZE, ERRP);
79 +memory_region_init_ram(MR, NULL, NAME, SIZE, ERRP);
81 -vmstate_register_ram_global(MR);
83 expression MR;
88 -memory_region_init_rom_nomigrate(MR, NULL, NAME, SIZE, ERRP);
89 +memory_region_init_rom(MR, NULL, NAME, SIZE, ERRP);
91 -vmstate_register_ram_global(MR);
93 expression MR;
100 -memory_region_init_rom_device_nomigrate(MR, NULL, OPS, OPAQUE, NAME, SIZE, ERRP);
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| /openbmc/u-boot/doc/ |
| H A D | README.marubun-pcmcia | 2 U-Boot MARUBUN MR-SHPC-01 PCMCIA controller driver
8 This driver supports MARUBUN MR-SHPC-01.
37 This is MR-SHPC-01 PCMCIA controller base address.
43 This is MR-SHPC-01 memory window base address.
49 This is MR-SHPC-01 attribute window base address.
55 This is MR-SHPC-01 I/O window base address.
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| /openbmc/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 931 #define MR(val, ba, cmd, cs1) \ macro
1181 mmdc0->mdscr = MR(63, 0, 3, cs); in mx6_lpddr2_cfg()
1186 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1189 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1192 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1195 mmdc0->mdscr = MR(val, 0, 3, cs); in mx6_lpddr2_cfg()
1477 debug("MR2 CS%d: 0x%08x\n", cs, (u32)MR(val, 2, 3, cs)); in mx6_ddr3_cfg()
1478 mmdc0->mdscr = MR(val, 2, 3, cs); in mx6_ddr3_cfg()
1480 debug("MR3 CS%d: 0x%08x\n", cs, (u32)MR(0, 3, 3, cs)); in mx6_ddr3_cfg()
1481 mmdc0->mdscr = MR(0, 3, 3, cs); in mx6_ddr3_cfg()
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-dbs/mysql/mariadb/ |
| H A D | 0001-Fix-library-LZ4-lookup.patch | 29 file(STRINGS "${LZ4_INCLUDE_DIRS}/lz4.h" LZ4_H REGEX "^#define LZ4_VERSION_[MR]")
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| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | atmel_nand.c | 1167 ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, in atmel_hwecc_nand_init_param()
1172 ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, in atmel_hwecc_nand_init_param()
1177 ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, in atmel_hwecc_nand_init_param()
1182 ecc_writel(CONFIG_SYS_NAND_ECC_BASE, MR, in atmel_hwecc_nand_init_param()
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| /openbmc/u-boot/drivers/spi/ |
| H A D | atmel_spi.c | 119 spi_writel(as, MR, as->mr); in spi_claim_bus()
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| /openbmc/qemu/docs/system/i386/ |
| H A D | tdx.rst | 144 TD attestation is initiated first by calling TDG.MR.REPORT inside TD to get the
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| /openbmc/qemu/target/xtensa/ |
| H A D | cpu.h | 121 MR = 32, enumerator
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| /openbmc/openbmc/meta-raspberrypi/recipes-graphics/userland/files/ |
| H A D | 0003-wayland-Add-Wayland-example.patch | 73 …�����������������������������������������������@JR?IS/:I%3C(8J&9G-BI7OU;FU@MR;IJ5HO1JZ2L[-CEL`O/Td…
76 …K\2CT3EV5DV4HR2FQ1FQ4FQ3EP5HS9IU8GT;MT4FM3FM<LS<LS9IP9IP:FN7GN8IO:JQ<IQ;IO>MR>MSCNT;OS;NS7IP9KRL]f…
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| /openbmc/qemu/target/s390x/tcg/ |
| H A D | insn-data.h.inc | 667 C(0x1c00, MR, RR_a, Z, r1p1_32s, r2_32s, new, r1_D32, mul, 0)
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| /openbmc/qemu/target/xtensa/core-dc233c/ |
| H A D | xtensa-modules.c.inc | 1654 { "MR", "m", REGFILE_MR, 32, 4 }
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| /openbmc/qemu/target/xtensa/core-de212/ |
| H A D | xtensa-modules.c.inc | 1617 { "MR", "m", REGFILE_MR, 32, 4 }
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| /openbmc/qemu/target/xtensa/core-dc232b/ |
| H A D | xtensa-modules.c.inc | 1576 { "MR", "m", 1, 32, 4 }
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| /openbmc/qemu/target/xtensa/core-de233_fpu/ |
| H A D | xtensa-modules.c.inc | 1707 { "MR", "m", REGFILE_MR, 32, 4 },
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| /openbmc/qemu/target/xtensa/core-test_kc705_be/ |
| H A D | xtensa-modules.c.inc | 10777 { "MR", "m", REGFILE_MR, 32, 4 },
|